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FDMS0312S N-Channel PowerTrench(R) SyncFETTM
January 2010
FDMS0312S
N-Channel PowerTrench(R) SyncFETTM
30 V, 42 A, 4.4 m Features
Max rDS(on) = 4.4 m Max rDS(on) = 5.8 m
General Description
The FDMS0312S has been designed to minimize losses in power conversion application. Advancements in both silicon and package technologies have been combined to offer the lowest rDS(on) while maintaining excellent switching performance. This device has the added benefit of an efficient monolithic Schottky body diode.
at VGS = 10 V, ID = 18 A at VGS = 4.5 V, ID = 14 A
Advanced Package and Silicon combination for low rDS(on) and high efficiency SyncFET Schottky Body Diode MSL1 robust package design 100% UIL tested RoHS Compliant
Applications
Synchronous Rectifier for DC/DC Converters Notebook Vcore/ GPU low side switch Networking Point of Load low side switch Desktop
Top
Bottom Pin 1 S
D
S S G
5 6 7 8
4G 3 2 1
D D
S S S
D
D
D
D D
Power 56
MOSFET Maximum Ratings TA = 25 C unless otherwise noted
Symbol VDS VGS Parameter Drain to Source Voltage Gate to Source Voltage Drain Current -Continuous (Package limited) ID -Continuous (Silicon limited) -Continuous -Pulsed EAS PD TJ, TSTG Single Pulse Avalanche Energy Power Dissipation Power Dissipation TC = 25 C TA = 25 C (Note 1a) (Note 3) TC = 25 C TC = 25 C TA = 25 C (Note 1a) (Note 4) Ratings 30 20 42 83 19 90 60 46 2.5 -55 to +150 mJ W C A Units V V
Operating and Storage Junction Temperature Range
Thermal Characteristics
R R
JC JA
Thermal Resistance, Junction to Case Thermal Resistance, Junction to Ambient (Note 1a)
2.7 50
C/W
Package Marking and Ordering Information
Device Marking FDMS0312S Device FDMS0312S Package Power 56
1
Reel Size 3 ''
Tape Width 12 mm
Quantity 3000 units
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(c)2010 Fairchild Semiconductor Corporation FDMS0312S Rev.C
FDMS0312S N-Channel PowerTrench(R) SyncFETTM
Electrical Characteristics TJ = 25 C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BVDSS BVDSS TJ IDSS IGSS Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate to Source Leakage Current, Forward ID = 1 mA, VGS = 0 V ID = 10 mA, referenced to 25 C VDS = 24 V, VGS = 0 V VGS = 20 V, VDS = 0 V 30 18 500 100 V mV/C A nA
On Characteristics (Note 2)
VGS(th) VGS(th) TJ rDS(on) gFS Gate to Source Threshold Voltage Gate to Source Threshold Voltage Temperature Coefficient Static Drain to Source On Resistance Forward Transconductance VGS = VDS, ID = 1 mA ID = 10 mA, referenced to 25 C VGS = 10 V, ID = 18 A VGS = 4.5 V, ID = 14 A VGS = 10 V, ID = 18 A, TJ = 125 C VDS = 5 V, ID = 18 A 1.2 1.9 -5 3.6 4.7 5 97 4.4 5.8 6.2 S m 3.0 V mV/C
Dynamic Characteristics
Ciss Coss Crss Rg Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance VDS = 15 V, VGS = 0 V, f = 1 MHz 2120 735 90 1.1 2820 975 135 2.2 pF pF pF
Switching Characteristics
td(on) tr td(off) tf Qg Qg Qgs Qgd Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Total Gate Charge Gate to Source Gate Charge Gate to Drain "Miller" Charge VGS = 0 V to 10 V VGS = 0 V to 4.5 V VDD = 15 V, ID = 18 A VDD = 15 V, ID = 18 A, VGS = 10 V, RGEN = 6 12 5 28 4 33 15 6.5 4.0 21 10 44 10 46 22 ns ns ns ns nC nC nC nC
Drain-Source Diode Characteristics
VSD trr Qrr Source to Drain Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0 V, IS = 2 A VGS = 0 V, IS = 18 A (Note 2) (Note 2) 0.48 0.80 26 26
JC
0.7 1.2 42 42
CA is
V ns nC
determined by
IF = 18 A, di/dt = 300 A/ s
Notes: 1. R JA is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R the user's board design.
is guaranteed by design while R
a. 50 C/W when mounted on a 1 in2 pad of 2 oz copper.
b. 125 C/W when mounted on a minimum pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 s, Duty cycle < 2.0%. 3. EAS of 60 mJ is based on starting TJ = 25 C, L = 1 mH, IAS = 11 A, VDD = 27 V, VGS = 10 V. 100% test at L = 0.3 mH, IAS = 16 A. 4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied.
FDMS0312S Rev.C
2
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FDMS0312S N-Channel PowerTrench(R) SyncFETTM
Typical Characteristics TJ = 25 C unless otherwise noted
NORMALIZED DRAIN TO SOURCE ON-RESISTANCE
90
PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX ID, DRAIN CURRENT (A)
12
VGS = 3 V
10 8
VGS = 3.5 V PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX
60
VGS = 10 V VGS = 4.5 V VGS = 4 V VGS = 3.5 V
6 4
VGS = 4 V VGS = 10 V VGS = 4.5 V
30
VGS = 3 V
2 0 0 30 60 90
ID, DRAIN CURRENT (A)
0 0.0
0.5 1.0 1.5 VDS, DRAIN TO SOURCE VOLTAGE (V)
2.0
Figure 1. On-Region Characteristics
Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage
12
SOURCE ON-RESISTANCE (m )
1.5
NORMALIZED DRAIN TO SOURCE ON-RESISTANCE
1.4 1.3 1.2 1.1 1.0 0.9 0.8
ID = 18 A VGS = 10 V
ID = 18 A
PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX
10 8 6 4
TJ = 25 oC TJ = 125 oC
0.7 -75
rDS(on), DRAIN TO
-50
-25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC)
2 2 4 6 8 10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On- Resistance vs Junction Temperature
90
PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX
Figure 4. On-Resistance vs Gate to Source Voltage
100
IS, REVERSE DRAIN CURRENT (A) VGS = 0 V
10
TJ = 125 oC
ID, DRAIN CURRENT (A)
60
VDS = 5 V
1 0.1 0.01
TJ = 25 oC
TJ = 125 oC
30
TJ = 25 oC TJ = -55 oC
TJ = -55 oC
0 1 2 3 4
VGS, GATE TO SOURCE VOLTAGE (V)
0.001 0.0
0.2
0.4
0.6
0.8
1.0
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode Forward Voltage vs Source Current
FDMS0312S Rev. C
3
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FDMS0312S N-Channel PowerTrench(R) SyncFETTM
Typical Characteristics TJ = 25 C unless otherwise noted
10
VGS, GATE TO SOURCE VOLTAGE (V) ID = 18 A
3000
Ciss
CAPACITANCE (pF)
VDD = 10 V VDD = 20 V
8 6
VDD = 15 V
1000
Coss
4 2 0 0 5 10 15 20 25 30 35
Qg, GATE CHARGE (nC)
100 50 0.1
f = 1 MHz VGS = 0 V
Crss
1
10
30
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs Drain to Source Voltage
90
ID, DRAIN CURRENT (A)
30
IAS, AVALANCHE CURRENT (A)
10
TJ = 25 oC
60
VGS = 10 V
TJ = 100 oC
30
Limited by Package R
JC = 2.7
o
VGS = 4.5 V C/W
TJ = 125
oC
1 0.01
0.1
1
10
100
0 25
50
75
100
o
125
150
tAV, TIME IN AVALANCHE (ms)
Tc, CASE TEMPERATURE ( C)
Figure 9. Unclamped Inductive Switching Capability
300 100
ID, DRAIN CURRENT (A)
Figure 10. Maximum Continuous Drain Current vs Case Temperature
3000
P(PK), PEAK TRANSIENT POWER (W)
1000
VGS = 10 V
100 s
10
1 ms 10 ms
THIS AREA IS LIMITED BY rDS(on)
100
1
100 ms 1s 10 s DC
0.1
SINGLE PULSE TJ = MAX RATED R
JA = 125
o
10
SINGLE PULSE R JA = 125 oC/W
C/W
TA = 25 oC
0.01 0.01
0.1
1
10
100200
1 TA = 25 oC 0.5 -4 -3 -2 10 10 10
10
-1
1
10
100
1000
VDS, DRAIN to SOURCE VOLTAGE (V)
t, PULSE WIDTH (sec)
Figure 11. Forward Bias Safe Operating Area
Figure 12. Single Pulse Maximum Power Dissipation
FDMS0312S Rev.C
4
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FDMS0312S N-Channel PowerTrench(R) SyncFETTM
Typical Characteristics TJ = 25 C unless otherwise noted
2 1
NORMALIZED THERMAL IMPEDANCE, Z JA DUTY CYCLE-DESCENDING ORDER
0.1
0.01
D = 0.5 0.2 0.1 0.05 0.02 0.01
PDM
t1
0.001
SINGLE PULSE R
JA = 125 o
t2
C/W
NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x Z JA x R
-2
JA
+ TA
0.0001 -4 10
10
-3
10
10
-1
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Junction-to-Ambient Transient Thermal Response Curve
FDMS0312S Rev.C
5
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FDMS0312S N-Channel PowerTrench(R) SyncFETTM
Typical Characteristics (continued)
SyncFET Schottky body diode Characteristics
Fairchild's SyncFET process embeds a Schottky diode in parallel with PowerTrench MoSFET. This diode exhibits similar characteristics to a discrete external Schottky diode in parallel with a MOSFET. Figure 14 shows the reverses recovery characteristic of the FDMS0312S.
Schottky barrier diodes exhibit significant leakage at high temperature and high reverse voltage. This will increase the power in the device.
20
IDSS, REVERSE LEAKAGE CURRENT (A)
10
-2
TJ = 125 oC
15
CURRENT (A)
10
-3
TJ = 100 oC
di/dt = 300 A/ s
10 5 0 -5 0 30 60
TIME (ns)
10
-4
TJ = 25 oC
10
-5
90
120
150
10
-6
0
5
10
15
20
25
30
VDS, REVERSE VOLTAGE (V)
Figure 14. FDMS0312S SyncFET body diode reverse recovery characteristic
Figure 15. SyncFET body diode reverses leakage versus drain-source voltage
FDMS0312S Rev.C
6
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FDMS0312S N-Channel PowerTrench(R) SyncFETTM
Dimensional Outline and Pad Layout
FDMS0312S Rev.C
7
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FDMS0312S N-Channel PowerTrench(R) SyncFETTM
TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. PDP SPMTM FlashWriter(R) * (R)* AccuPowerTM FPSTM Power-SPMTM Auto-SPMTM The Power Franchise(R) F-PFSTM PowerTrench(R) Build it NowTM (R) PowerXSTM FRFET(R) CorePLUSTM Global Power ResourceSM Programmable Active DroopTM CorePOWERTM QFET(R) Green FPSTM CROSSVOLTTM TinyBoostTM QSTM Green FPSTM e-SeriesTM CTLTM TinyBuckTM Quiet SeriesTM GmaxTM Current Transfer LogicTM TinyCalcTM RapidConfigureTM GTOTM DEUXPEED(R) TinyLogic(R) TM IntelliMAXTM Dual CoolTM TINYOPTOTM ISOPLANARTM EcoSPARK(R) TinyPowerTM Saving our world, 1mW/W/kW at a timeTM EfficentMaxTM MegaBuckTM TinyPWMTM EZSWITCHTM* SignalWiseTM MICROCOUPLERTM TinyWireTM TM* SmartMaxTM MicroFETTM TriFault DetectTM SMART STARTTM MicroPakTM TRUECURRENTTM* SPM(R) MicroPak2TM (R) SerDesTM STEALTHTM MillerDriveTM Fairchild(R) SuperFETTM MotionMaxTM Fairchild Semiconductor(R) SuperSOTTM-3 Motion-SPMTM UHC(R) FACT Quiet SeriesTM SuperSOTTM-6 OptiHiTTM (R) Ultra FRFETTM FACT SuperSOTTM-8 OPTOLOGIC(R) UniFETTM FAST(R) OPTOPLANAR(R) SupreMOSTM (R) VCXTM FastvCoreTM SyncFETTM VisualMaxTM FETBenchTM Sync-LockTM XSTM
tm
tm
tm
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD'S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
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Rev. I46
Preliminary
First Production
No Identification Needed Obsolete
Full Production Not In Production
FDMS0312S Rev.C
8
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